26-10 Volantis의 광학 AI 메모리 시리즈 A 조달
작성자의 핵심 판단
자료는 광학 인터커넥트가 실현되면 AI 인프라의 병목을 HBM 적층만이 아니라 광학 I/O·패키징·메모리 풀링까지 넓혀 볼 필요가 있다고 평가한다.
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- 원문 구간 1
4. 첫 제품 목표는 10TB 메모리와 240TB/s 대역폭으로, 20조 파라미터급 모델까지 빠르게 추론하는 것 5. 핵심은 HBM을 더 많이 쌓는 게 아니라 메모리와 연산 사이의 거리 자체를 없애는 것에 가까움 6. 이 구조가 성공하면 AI 인프라의 가치가 GPU + HBM 중심에서 광학 I/O, 패키징, 메모리 풀링, 시스템 설계로 더 넓게 이동함 7. 중요한 건 HBM의 절대 수요보다 지금처럼 제한된 패키지 공간과 대역폭에서 발생하는 희소성 프리미엄이 약해질 수 있다는 점 8. 광학 인터커넥트가 GPU 간 연결을 넘어 GPU<>메모리 내부까지 침투하면 포토닉스 시장의 TAM 자체가 한 단계 커짐 ✍️HBM의 물리적 한계를 빛으로 우회한다면 다음은 광학 인터커넥트, 패키징, 시스템 아키텍처. HBM 투자자라면 가장 경계해서 봐야 할 기술 [source] https://sandpczone.com/volantis-88m-series-a-photonic-memory [외부 원문 1] [URL] https://sandpczone.com/volantis-88m-series-a-photonic-memory [제목] Volantis Series A: $88M Bet on Photonic AI Memory Startups & Funding Volantis Series A: $88M Bet on Photonic AI Memory 2 Oct 2026 · SandPCZone · 2716 words · 13 min read Most AI chips still talk to memory the old way: short copper wires, a handful of expensive stacks, and a hard ceiling on how big and how fast a model can be at the same time.
- 원문 구간 2
That is still a hypothesis. Laser suppliers, packaging houses, and yield curves will settle it. Pros if Volantis is right Breaks the capacity-vs-bandwidth tradeoff that HBM shoreline enforces Uses a laser family already volume-proven in consumer devices Targets agent interactivity, not only training FLOPs Keeps compute IP “known” while concentrating risk in interconnect Cons and open risks No public third-party A-1 benchmarks yet 2027 delivery leaves a long execution gap after the raise Advanced packaging remains hard even when physics is friendly Software, compilers, and customer bring-up can erase silicon gains Competitive HBM roadmaps will not stand still until 2027 What could still go wrong before 2027 Trustworthy coverage has to say the quiet part. This is a Series A hardware story with ambitious system claims and a next-year ship window.
이 자료에서 다룬 사실
Volantis는 2026년 10월 1일 8,800만달러 규모 시리즈 A 조달을 발표했으며 첫 A-1 시스템은 2027년을 목표로 제시했다.
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- 원문 구간 1
On October 1, 2026, San Francisco semiconductor startup Volantis said it raised an $88 million Series A to attack that ceiling with light. The Volantis Series A , co-led by Stripe veteran Lachy Groom and Abstract Ventures, brings total funding to about $97 million. The company’s pitch is blunt. Today’s accelerators force a tradeoff between memory capacity and memory bandwidth. Volantis wants both — by replacing those short electrical links with a photonic fabric that can reach more than 200 millimeters and pool well over 200 memory chiplets around compute. If the hardware ships on schedule in 2027, coding agents and other long-running AI workflows could see a different clock speed for the same model size. That is the claim. What follows is what is confirmed, what is company-reported, and what still has to survive a data-center floor.
- 원문 구간 2
In brief $88M Series A co-led by Lachy Groom and Abstract Ventures; ~ $97M raised to date First system A-1 targets 10 TB memory, 240 TB/s bandwidth, 15U , 20 kW , customer delivery 2027 Company-claimed goals: models >20T parameters , up to 10,000 tokens/sec per user Optical reach 200mm+ vs ~ 2–5mm electrical; aims for >220 memory chiplets vs ~ 8 HBM stacks today Custom micro-VCSELs (gallium arsenide), no external lasers; end-to-end links claimed <1 pJ/bit What the Volantis Series A actually buys The round is not a mystery seed. It is a large Series A for a chip company that has been building in private for years and is now selling a system story, not just a laser slide. According to the company’s PR Newswire release and its own blog post, Groom and Abstract Ventures co-led the $88 million raise.
그렇게 판단한 이유
- 회사 설명은 200mm 이상 광학 연결로 220개 이상 메모리 칩렛을 하나의 풀에 묶을 수 있다고 제시하며 기존 패키지의 전기 배선 거리 제약과 대비한다.
- 레이저 공급망, 패키징, 수율과 고객 랙 성능은 아직 미확인 항목으로 남는다고 구분한다.
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- 원문 구간 1
Industry analysis of packages like Blackwell often describes a “shoreline” limit: only so much of the die edge can be given to HBM before the rest is needed for other I/O. Two imperfect alternatives sit on opposite corners of the same tradeoff: On-chip SRAM — very fast, tiny capacity, expensive area, great for low-latency tricks, bad for multi-trillion-parameter monsters. HBM / off-package DRAM — much more capacity, still bandwidth-capped by how many stacks you can park within electrical reach. Volantis argues even newer ideas such as 3D DRAM stay on that same curve. The company’s bet is that the curve itself is the bug — and that optics can change the geometry. What the wall feels like in practice Agents that pause for tens of minutes on a hard coding task Context windows that shrink because the KV cache will not fit at useful speed
- 원문 구간 2
The company cites figures above 220 memory chiplets in a single pool, versus the handful of HBM stacks on a classic GPU package. Data moves as light, generated by micro-VCSELs — tiny lasers of the same family that already power Face ID and similar sensors in hundreds of millions of phones. That is a supply-chain point, not just a physics point. Apple and others spent a decade hardening gallium-arsenide VCSEL manufacturing. Volantis wants to ride that base instead of leaning on scarcer indium-phosphide laser ecosystems common in some data-center optics. The company also stresses what it is not doing. Much of the industry’s co-packaged optics (CPO) work — including efforts associated with Ayar Labs, where Volantis CTO Roy Meade previously held a VP role — focuses on chip-to-chip and scale-up networking: moving bits between accelerators and switches across a rack.
- 원문 구간 3
That is still a hypothesis. Laser suppliers, packaging houses, and yield curves will settle it. Pros if Volantis is right Breaks the capacity-vs-bandwidth tradeoff that HBM shoreline enforces Uses a laser family already volume-proven in consumer devices Targets agent interactivity, not only training FLOPs Keeps compute IP “known” while concentrating risk in interconnect Cons and open risks No public third-party A-1 benchmarks yet 2027 delivery leaves a long execution gap after the raise Advanced packaging remains hard even when physics is friendly Software, compilers, and customer bring-up can erase silicon gains Competitive HBM roadmaps will not stand still until 2027 What could still go wrong before 2027 Trustworthy coverage has to say the quiet part. This is a Series A hardware story with ambitious system claims and a next-year ship window.
- 원문 구간 4
Several uncertainties are concrete. Scorecard: what we know vs what is still foggy Criteria What we know Still unknown Funding $88M Series A; ~$97M total (company) Exact valuation, dilution, prior rounds detail Team Named leaders with HBM/CPO/VCSEL resumes Full headcount, manufacturing partners Physics demos Company claims wafer-scale BER, thermal stability Independent replication A-1 specs Published capacity/BW/power/size targets Measured tok/s on customer models Competitive comps 15× tok/$, 6× tok/W vs named Nvidia gen Methodology, workload mix, fair baselines Customers “Plans to deliver in 2027” Named design wins, volume POs Software stack Implied integration with existing compute IP Framework support, operator maturity Other failure modes are boring and deadly: a thermal wall inside 15U at 20 kW, waveguide yield that looks fine at wafer and ugly at volume, a memory vendor roadmap that undercuts the cost thesis, or a software stack that cannot keep the optical pool busy.